For forming MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices or high memory devices, such as DRAMs (Dynamic Random Access Memories), it is often necessary to form a thin, high dielectric constant (high-k) coating onto a substrate, such as a silicon wafer. For example, the thickness of such coatings is often less than 30 nanometers. To form such a thin dielectric coating on a substrate, a variety of deposition techniques have been developed.
For example, chemical vapor deposition (CVD) has traditionally been used to form a high-k coating on a substrate. Chemical vapor deposition typically involves supplying a gas precursor and oxidizing gas to a vessel. The precursors decompose and react with the oxidizing gas on the surface of the substrate to form the oxide coating. However, chemical vapor deposition generally results in relatively thick layers that have a number of defects, which can limit the performance of the resulting electronic devices. Thus, after the high-k coating is formed, it is usually then exposed to an annealing gas so that oxygen can penetrate into the coating to eliminate the defects at the interface of the coating and the substrate and in the bulk of the coating. In many cases, relatively high temperatures are required to allow the oxidizing gas to diffuse through the coating in the manner described above.
However, such high temperatures can sometimes cause unwanted crystallization of the coating, further increasing the leakage current through the grain boundaries, which can adversely degrade with the overall performance of the electrical device.
Thus, in view of these problems, another method known as “atomic layer deposition” has been developed for depositing a high-k coating onto a substrate. Atomic layer deposition involves the sequential cycling of reactive chemistries to the wafer substrate to form thin film layers. Specifically, each reaction cycle is conducted at the same deposition and surface reactivation conditions so that only one monolayer is formed per reaction cycle. For example, atomic layer deposition generally involves supplying a gas precursor (e.g., inorganic metal halides) to provide a single monolayer. Thereafter, a second gas, such as water, is supplied to fully oxidize the gas precursor and form a metal oxide film on the wafer substrate. Additional cycles are utilized to form additional monolayers until the desired coating is formed. Thereafter, an annealing gas is supplied to remove defects from the coating. For instance, as shown in FIG. 4A, a coating formed according to a conventional “atomic layer deposition” technique is illustrated. Other examples of such conventional atomic layer deposition techniques are described in U.S. Pat. Nos. 4,058,430 and 4,413,022 to Suntola.
Although atomic layer deposition has some benefits over prior methods, it also possesses a variety of problems. For example, atomic layer deposition provides for very little processing control and, as a result, certain target characteristics of the dielectric coating may not be readily achieved. In addition, because atomic layer deposition is limited to one monolayer per reaction cycle, its effectiveness in a production environment may be limited.
As such, a need currently exists for an improved method of depositing a high-k coating onto a substrate.